Loading .gitignore 0 → 100644 +65 −0 Original line number Diff line number Diff line # Created by https://www.toptal.com/developers/gitignore/api/xilinxvivado # Edit at https://www.toptal.com/developers/gitignore?templates=xilinxvivado ### XilinxVivado ### ######################################################################################################### ## This is an example .gitignore file for Vivado, please treat it as an example as ## it might not be complete. In addition, XAPP 1165 should be followed. ######### #Exclude all * !*/ !.gitignore ########################################################################### ## VIVADO #Source files: #Do NOT ignore VHDL, Verilog, block diagrams or EDIF files. !*.vhd !*.v !*.bd !*.edif #IP files #.xci: IP-core property file with core container disabled !*.xci #*.dcp (checkpoint files: better be ignored!) #!*.dcp !*.vds !*.pb #All bd comments and layout coordinates are stored within .ui !*.ui !*.ooc #System Generator !*.mdl !*.slx !*.bxml #Simulation logic analyzer !*.wcfg !*.coe #MIG !*.prj !*.mem #Project files #XPR + *.XML ? XPR (Files are merged into a single XPR file for 2014.1 version) #Do NOT ignore *.xpr files !*.xpr #Include *.xml files for 2013.4 or earlier version !*.xml #Constraint files #Do NOT ignore *.xdc files !*.xdc #TCL - files !*.tcl #Journal - files !*.jou #Reports !*.rpt !*.txt !*.vdi #C-files !*.c !*.h !*.elf !*.bmm !*.xmp # End of https://www.toptal.com/developers/gitignore/api/xilinxvivado No newline at end of file Loading
.gitignore 0 → 100644 +65 −0 Original line number Diff line number Diff line # Created by https://www.toptal.com/developers/gitignore/api/xilinxvivado # Edit at https://www.toptal.com/developers/gitignore?templates=xilinxvivado ### XilinxVivado ### ######################################################################################################### ## This is an example .gitignore file for Vivado, please treat it as an example as ## it might not be complete. In addition, XAPP 1165 should be followed. ######### #Exclude all * !*/ !.gitignore ########################################################################### ## VIVADO #Source files: #Do NOT ignore VHDL, Verilog, block diagrams or EDIF files. !*.vhd !*.v !*.bd !*.edif #IP files #.xci: IP-core property file with core container disabled !*.xci #*.dcp (checkpoint files: better be ignored!) #!*.dcp !*.vds !*.pb #All bd comments and layout coordinates are stored within .ui !*.ui !*.ooc #System Generator !*.mdl !*.slx !*.bxml #Simulation logic analyzer !*.wcfg !*.coe #MIG !*.prj !*.mem #Project files #XPR + *.XML ? XPR (Files are merged into a single XPR file for 2014.1 version) #Do NOT ignore *.xpr files !*.xpr #Include *.xml files for 2013.4 or earlier version !*.xml #Constraint files #Do NOT ignore *.xdc files !*.xdc #TCL - files !*.tcl #Journal - files !*.jou #Reports !*.rpt !*.txt !*.vdi #C-files !*.c !*.h !*.elf !*.bmm !*.xmp # End of https://www.toptal.com/developers/gitignore/api/xilinxvivado No newline at end of file